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  atmel-42181cs?sam-d21_summary?07/2014 smart description the atmel ? | smart ? sam d21 is a series of low-powe r microcontrollers using the 32-bit arm ? cortex ? -m0+ processor, and ranging from 32- to 64-pins with up to 256kb flash and 32kb of sram. the sam d21 devices operate at a maximum frequency of 48mhz and reach 2.14 coremark/mhz. they are designed for simple and intuitive migration with identical peripheral modules, hex compatible code, identical linear address map and pin compatible migration paths between all devices in the product series. all devices include intelligent and flexible peripherals, atmel event system for inter-peripheral signaling, and support for capacitive touch button, slider and wheel user interfaces. the atmel sam d21 devices provide the follow ing features: in-system programmable flash, twelve-channel direct memory access (dma) controller, 12 channel event system, programmable interrupt controller, up to 52 pr ogrammable i/o pins, 32-bit real-time clock and calendar, up to five 16-bit timer/counters (tc) and three 24-bit timer/counters for control (tcc), where each tc can be configured to perform frequency and waveform generation, accurate program execution timing or input capture with time and frequency measurement of digital signals. the tcs can operate in 8- or 16- bit mode, selected tcs can be cascaded to form a 32-bit tc, and three timer/counters have extended functions optimized for motor, lighting and other control applications. the series provide one full-speed usb 2.0 embedded host and device interface; up to six serial communication modules (sercom) that each can be configured to act as an usart, uart, spi, i 2 c up to 3.4mhz, smbus, pmbus, and lin slave; two-channel i 2 s interface; up to twenty-channel 350ksps 12-bit adc with programmable gain and optional oversampling and decimation supporting up to 16-bit resolution, one 10-bit 350ksps dac, two analog comparators with window mode, periph eral touch controller supporting up to 256 buttons, sliders, wheels and proximity sensin g; programmable watchdog timer, brown-out detector and power-on reset and two-pin serial wire debug (swd) program and debug interface. all devices have accurate and low-power external and internal oscillators. all oscillators can be used as a source for the system clock. different clock domains can be independently configured to run at different frequencies, enabling power sa ving by running each peripheral at its optimal clock frequency, and thus maintaining a high cpu frequency while reducing power consumption. the sam d21 devices have two software-selectable sleep modes, idle and standby. in idle mode the cpu is stopped while all other functions c an be kept running. in standby all clocks and functions are stopped expect those selected to continue running. the device supports sleepwalking. this feature allows the peripheral to wake up from sleep based on predefined conditions, and thus allows the cpu to wake up only when needed, e.g. when a threshold is crossed or a result is ready. the event syst em supports synchronous and asynchronous events, allowing peripherals to receive, react to and send events even in standby mode. the flash program memory can be reprogramme d in-system through t he swd interface. the same interface can be used for non-intrusive on-chip debug of application code. a boot loader running in the device can use any communication interface to download and upgrade the application program in the flash memory. the atmel sam d21 devices are supported with a full suite of program and system development tools, including c compilers, macro assemblers, program debugger/simulators, programmers and evaluation kits . atmel sam d21 e / sam d21 g / sam d21 j smart arm-based microcontroller datasheet summary
2 atmel | smart sam d2 1 [datasheet summary] atmel-42181cs?sam-d21_summary?07/2014 features z processor z arm cortex-m0+ cpu running at up to 48mhz z single-cycle hardw are multiplier z micro trace buffer (mtb) z memories z 32/64/128/256kb in-system self-programmable flash z 4/8/16/32kb sram memory z system z power-on reset (por) and brown-out detection (bod) z internal and external clock options wi th 48mhz digital frequency locked loop (dfll 48m) and 48mhz to 96mhz fractional digital phase locked loop (fdpll96m) z external interrupt controller (eic) z 16 external interrupts z one non-maskable interrupt z two-pin serial wire d ebug (swd) programming, te st and debugging interface z low power z idle and standby sleep modes z sleepwalking peripherals z peripherals z 12-channel direct memory access controller (dmac) z 12-channel event system z up to five 16-bit timer/counter s (tc), configurable as either: z one 16-bit tc with compare/capture channels z one 8-bit tc with compare/capture channels z one 32-bit tc with compare/capt ure channels, by using two tcs z three 24-bit timer/counters for c ontrol (tcc), with extended functions: z up to four compare channels wi th optional complementary output z generation of synchronized pulse width modulation (pwm) pattern across port pins z deterministic fault prot ection, fast decay and configurable dead-time between comp lementary output z dithering that increase re solution with up to 5 bit and reduce quantization error z 32-bit real time counter (rtc ) with clock/ca lendar function z watchdog timer (wdt) z crc-32 generator z one full-speed (12mbps) universal serial bus (usb) 2.0 interface z embedded host and device function z eight endpoints z up to six serial comm unication interfaces (sercom), each c onfigurable to operate as either: z usart with full-duplex and single- wire half-duplex configuration z i 2 c up to 3.4mhz z spi z lin slave z one two-channel inter-ic sound (i 2 s) interface z one 12-bit, 350ksps analog- to-digital converter (a dc) with up to 20 channels z differential and single-ended input z 1/2x to 16x programmable gain stage z automatic offset and gain error compensation z oversampling and decimation in hardware to support 13-, 14-, 15- or 16-bit resolution z 10-bit, 350ksps digital-to -analog converter (dac) z two analog comparators (ac) with window compare function z peripheral touch c ontroller (ptc) z 256-channel capacitive touc h and proximity sensing z i/o z up to 52 programmable i/o pins z drop in compatible with sam d20 z packages z 64-pin tqfp, qfn z 48-pin tqfp, qfn z 32-pin tqfp, qfn z operating voltage z 1.62v ? 3.63v
3 atmel | smart sam d2 1 [datasheet summary] atmel-42181cs?sam-d21_summary?07/2014 1. configuration summary sam d21j sam d21g sam d21e pins 64 48 32 general purpose i/o-pins (gpios) 52 38 26 flash 256/128/64/32kb 256/128/64/32kb 256/128/64/32kb sram 32/16/8/4kb 32/16/8/4kb 32/16/8/4kb timer counter (tc) instances 5 3 3 waveform output channels per tc instance 2 2 2 timer counter for control (tcc) instances 3 3 3 waveform output channels per tcc 8/4/2 8/4/2 6/4/2 dma channels 12 12 12 usb interface 1 1 1 serial communication interface (sercom) instances 6 6 4 inter-ic sound (i 2 s) interface 1 1 1 analog-to-digital converter (adc) channels 20 14 10 analog comparators (ac) 2 2 2 digital-to-analog converter (dac) channels 1 1 1 real-time counter (rtc) yes yes yes rtc alarms 1 1 1 rtc compare values 1 32-bit value or 2 16-bit values 1 32-bit value or 2 16-bit values 1 32-bit value or 2 16-bit values external interrupt lines 16 16 16 peripheral touch controller (ptc) x and y lines 16x16 12x10 10x6 maximum cpu frequency 48mhz packages qfn tqfp qfn tqfp qfn tqfp oscillators 32.768khz crystal oscillator (xosc32k) 0.4-32mhz crystal oscillator (xosc) 32.768khz internal oscillator (osc32k) 32khz ultra-low-power internal oscillator (osculp32k) 8mhz high-accuracy internal oscillator (osc8m) 48mhz digital frequency locked loop (dfll48m) 96mhz fractional digital phased locked loop (fdpll96m)
4 atmel | smart sam d2 1 [datasheet summary] atmel-42181cs?sam-d21_summary?07/2014 event system channels 12 12 12 sw debug interface yes yes yes watchdog timer (wdt) yes yes yes sam d21j sam d21g sam d21e
5 atmel | smart sam d2 1 [datasheet summary] atmel-42181cs?sam-d21_summary?07/2014 2. ordering information 2.1 sam d21e samd 21 e 15 a - m u t product family samd = general purpose microcontroller 21 = cortex m0 + cpu, basic feature set e = 32 pins g = 48 pins j = 64 pins no character = tray (default) t = tape and reel u = 40 - 85 o c matte sn plating a = tqfp m = qfn + dma + usb product series flash memory density device variant a = default variant pin count package carrier package grade package type 18 = 256kb 17 = 128kb 16 = 64kb 15 = 32kb ordering code flash (bytes) sram (bytes) pacage carrier type atsamd21e15a-au 32k 4k tqfp32 tray atsamd21e15a-aut tqfp32 ta p e & r e e l atsamd21e15a-mu qfn32 tray atsamd21e15a-mut qfn32 ta p e & r e e l atsamd21e16a-au 64k 8k tqfp32 tray atsamd21e16a-aut tqfp32 ta p e & r e e l atsamd21e16a-mu qfn32 tray atsamd21e16a-mut qfn32 ta p e & r e e l atsamd21e17a-au 128k 16k tqfp32 tray atsamd21e17a-aut tqfp32 ta p e & r e e l atsamd21e17a-mu qfn32 tray atsamd21e17a-mut qfn32 ta p e & r e e l
6 atmel | smart sam d2 1 [datasheet summary] atmel-42181cs?sam-d21_summary?07/2014 2.2 sam d21g 2.3 sam d21j atsamd21e18a-au 256k 32k tqfp32 tray atsamd21e18a-aut tqfp32 ta p e & r e e l atsamd21e18a-mu qfn32 tray atsamd21e18a-mut qfn32 ta p e & r e e l ordering code flash (bytes) sram (bytes) package carrier type ordering code flash (bytes) sram (bytes) package carrier type atsamd21g15a-au 32k 4k tqfp48 tray atsamd21g15a-aut tqfp48 ta p e & r e e l atsamd21g15a-mu qfn48 tray atsamd21g15a-mut qfn48 ta p e & r e e l atsamd21g16a-au 64k 8k tqfp48 tray atsamd21g16a-aut tqfp48 ta p e & r e e l atsamd21g16a-mu qfn48 tray atsamd21g16a-mut qfn48 ta p e & r e e l atsamd21g17a-au 128k 16k tqfp48 tray atsamd21g17a-aut tqfp48 ta p e & r e e l atsamd21g17a-mu qfn48 tray atsamd21g17a-mut qfn48 ta p e & r e e l atsamd21g18a-au 256k 32k tqfp48 tray atsamd21g18a-aut tqfp48 ta p e & r e e l atsamd21g18a-mu qfn48 tray atsamd21g18a-mut qfn48 ta p e & r e e l ordering code flash (bytes) sram (bytes) package carrier type atsamd21j15a-au 32k 4k tqfp64 tray atsamd21j15a-aut tqfp64 ta p e & r e e l atsamd21j15a-mu qfn64 tray atsamd21j15a-mut qfn64 ta p e & r e e l
7 atmel | smart sam d2 1 [datasheet summary] atmel-42181cs?sam-d21_summary?07/2014 atsamd21j16a-au 64k 8k tqfp64 tray atsamd21j16a-aut tqfp64 ta p e & r e e l atsamd21j16a-mu qfn64 tray atsamd21j16a-mut qfn64 ta p e & r e e l atsamd21j17a-au 128k 16k tqfp64 tray atsamd21j17a-aut tqfp64 ta p e & r e e l atsamd21j17a-mu qfn64 tray atsamd21j17a-mut qfn64 ta p e & r e e l atsamd21j18a-au 256k 32k tqfp64 tray atsamd21j18a-aut tqfp64 ta p e & r e e l atsamd21j18a-mu qfn64 tray atsamd21j18a-mut qfn64 ta p e & r e e l ordering code flash (bytes) sram (bytes) package carrier type
8 atmel | smart sam d2 1 [datasheet summary] atmel-42181cs?sam-d21_summary?07/2014 3. block diagram 1. some products have different number of sercom instances, timer/counter instances, ptc signals and adc signals. 2. the three tcc instances have different configurations , including the number of waveform output (wo) lines. 6 x sercom 8 x timer counter real time counter ahb-apb bridge c m m high speed bus matrix port port watchdog timer serial wire swdio s cortex-m0+ processor fmax 48 mhz swclk device service unit ahb-apb bridge a 20-channel 12-bit adc 350ksps ain[19..0] vrefa ain[3..0] s sram controller 32/16/8/4kb ram m reset controller sleep controller clock controller power manager resetn 5 x timer / counter event system s 6 x sercom 2 analog comparators system controller xout xin xout32 xin32 osculp32k osc32k osc8m dfll48m bod33 xosc32k xosc vref x[15..0] y[15..0] peripheral touch controller peripheral access controller ahb-apb bridge b vrefa vout 10-bit dac external interrupt controller peripheral access controller peripheral access controller extint[15..0] nmi gclk_io[7..0] s pad0 wo1 pad1 pad2 pad3 wo0 vrefb 256/128/64/32kb nvm nvm controller cache m dma usb fs device mini-host dp dm 3x timer / counter for control won iobus fdpll96m dma dma dma dma dma mck[1..0] sck[1..0] inter-ic sound controller sd[1..0] fs[1..0] dma memory trace buffer s sof 1khz wo0 wo1 (2) generic clock controller cmp[1..0]
9 atmel | smart sam d2 1 [datasheet summary] atmel-42181cs?sam-d21_summary?07/2014 4. pinout 4.1 sam d21j pa00 1 pa01 2 pa02 3 pa03 4 pb04 5 pb05 6 gndana 7 vddana 8 pb06 9 pb07 10 pb08 11 pb09 12 pa04 13 pa05 14 pa06 15 pa07 16 pa08 17 pa09 18 pa10 19 pa11 20 vddio 21 gnd 22 pb10 23 pb11 24 pb12 25 pb13 26 pb14 27 pb15 28 pa12 29 pa13 30 pa14 31 pa15 32 vddio 48 gnd 47 pa25 46 pa24 45 pa23 44 pa22 43 pa21 42 pa20 41 pb17 40 pb16 39 pa19 38 pa18 37 pa17 36 pa16 35 vddio 34 gnd 33 pb22 49 pb23 50 pa27 51 resetn 52 pa28 53 gnd 54 vddcore 55 vddin 56 pa30 57 pa31 58 pb30 59 pb31 60 pb00 61 pb01 62 pb02 63 pb03 64 digital pin analog pin oscillator ground input supply regulated output supply reset pin
10 atmel | smart sam d2 1 [datasheet summary] atmel-42181cs?sam-d21_summary?07/2014 4.2 sam d21g pa21 pa00 1 pa01 2 pa02 3 pa03 4 gndana 5 vddana 6 pb08 7 pb09 8 pa04 9 pa05 10 pa06 11 pa07 12 pa08 13 pa09 14 pa10 15 pa11 16 vddio 17 gnd 18 pb10 19 pb11 20 pa12 21 pa13 22 pa14 23 pa15 24 vddio 36 gnd 35 pa25 34 pa24 33 pa23 32 pa22 31 30 pa20 29 pa19 28 pa18 27 pa17 26 pa16 25 pb22 37 pb23 38 pa27 39 resetn 40 pa28 41 gnd 42 vddcore 43 vddin 44 pa30 45 pa31 46 pb02 47 pb03 48 digital pin analog pin oscillator ground input supply regulated output supply reset pin
11 atmel | smart sam d2 1 [datasheet summary] atmel-42181cs?sam-d21_summary?07/2014 4.3 sam d21e pa00 1 pa01 2 pa02 3 pa03 4 pa04 5 pa05 6 pa06 7 pa07 8 vddana 9 gnd 10 pa08 11 pa09 12 pa10 13 pa11 14 pa14 15 pa15 16 pa25 24 pa24 23 pa23 22 pa22 21 pa19 20 pa18 19 pa17 18 pa16 17 pa27 25 resetn 26 pa28 27 gnd 28 vddcore 29 vddin 30 pa30 31 pa31 32 digital pin analog pin oscillator ground input supply regulated output supply reset pin
12 atmel | smart sam d2 1 [datasheet summary] atmel-42181cs?sam-d21_summary?07/2014 5. product mapping figure 5-1. atmel | smart sam d21 product mapping this figure represents the full configuration of the atmel ? sam d21 with maximum flash and sram capabilities and a full set of peripherals. refer to the ?configuration summary? on page 3 for details. code sram undefined peripherals reserved undefined global memory space 0x00000000 0x20000000 0x20008000 0x40000000 0x43000000 0x60000000 internal sram sram ahb-apb bridge a ahb-apb bridge b ahb-apb bridge c ahb-apb internal flash reserved code 0x00000000 0x00400000 0x1fffffff 0x20000000 0x20007fff 0x40000000 0x41000000 0x42000000 0x42ffffff reserved pac0 pm sysctrl gclk wdt rtc eic ahb-apb bridge a 0x40000000 0x40000400 0x40000800 0x40000c00 0x40001000 0x40001400 0x40001800 0x40ffffff 0x40001c00 ahb-apb bridge b reserved pac1 dsu nvmctrl port 0x41000000 0x41002000 0x41004000 0x41004400 0x41ffffff 0x41007000 sercom5 pac2 evsys sercom0 sercom1 sercom2 sercom3 sercom4 ahb-apb bridge c tc7 tcc0 tcc1 tcc2 tc3 tc4 tc5 tc6 adc ac 0x42000000 0x42000400 0x42000800 0x42000c00 0x42001000 0x42001400 0x42001800 0x42002000 0x42001c00 0x42003000 0x42003400 0x42003800 0x42003c00 0x42004000 0x42004400 0x42004800 reserved 0x42ffffff 0x60000200 0xffffffff reserved system 0xe0000000 dac 0x42004c00 0x42002400 0x42002800 0x42002c00 ptc 0x42005400 0x42005000 i2s dmac usb mtb 0x41004800 0x41005000 0x41006000 0xe0000000 0xe000e000 0xe000f000 0xe00ff000 0xe0100000 0xffffffff system reserved scs reserved romtable reserved
13 atmel | smart sam d2 1 [datasheet summary] atmel-42181cs?sam-d21_summary?07/2014 6. processor and architecture 6.1 cortex m0+ processor the atmel | smart sam d21 implements the arm ? cortex?-m0+ processor, which is based on the armv6 architecture and thumb ? -2 isa. the cortex m0+ is 100% instruction set compatible with its predecessor, the cortex-m0 processor, and upward compatible to cortex-m3 and m4 processors. for more information refer to www.arm.com . 6.1.1 cortex m0+ configuration note: 1. all software run in privileged mode only the arm cortex-m0+ core has two bus interfaces: z single 32-bit amba ? -3 ahb-lite? system interface that provides connections to peripherals and all system memory, including flash and ram z single 32-bit i/o port bus interfacing to the port with one-cycle loads and stores features configuration option atmel | smart sam d21 configuration interrupts external interrupts 0-32 32 data endianness little-endian or big-endian little-endian systick timer present or absent present number of watchpoint comparators 0, 1, 2 2 number of breakpoint comparators 0, 1, 2, 3, 4 4 halting debug support present or absent present multiplier fast or small fast (single cycle) single-cycle i/o port present or absent present wake-up interrupt controller supported or not supported not supported vector table offset register present or absent present unprivileged/privileged support present or absent absent (1) memory protection unit not present or 8-region not present reset all registers present or absent absent instruction fetch width 16-bit only or mostly 32-bit 32-bit
14 atmel | smart sam d2 1 [datasheet summary] atmel-42181cs?sam-d21_summary?07/2014 7. packaging information 7.1 thermal considerations 7.1.1 thermal resistance data table 7-1 summarizes the thermal resistance data depending on the package. table 7-1. thermal resistance data 7.1.2 junction temperature the average chip-junction temperature, t j , in c can be obtained from the following: where: z ja = package thermal resistance, junction-to-ambient (c/w), provided in table 7-1 . z jc = package thermal resistance, junction-to-case thermal resistance (c/w), provided in table 7-1 . z heatsink = cooling device thermal resistance (c/w), provided in the device datasheet. z p d = device power consumption (w). z t a = ambient temperature (c). from the first equation, the user can derive the estimated life time of the chip and decide if a cooling device is necessary or not. if a cooling device is to be fitted on the chip, the second equation should be used to compute the resulting average chip-junction temperature t j in c. package type ja jc 32-pin tqfp 68 c/w 25.8 c/w 48-pin tqfp 78.8 c/w 12.3 c/w 64-pin tqfp 66.7 c/w 11.9 c/w 32-pin qfn 37.2 c/w 3.1 c/w 48-pin qfn 33 c/w 11.4 c/w 64-pin qfn 33.5 c/w 11.2 c/w
15 atmel | smart sam d2 1 [datasheet summary] atmel-42181cs?sam-d21_summary?07/2014 7.2 package drawings 7.2.1 64-pin tqfp table 7-2. device and package maximum weight table 7-3. package characteristics table 7-4. package reference 300 mg moisture sensitivity level msl3 jedec drawing reference ms-026 jesd97 classification e3
16 atmel | smart sam d2 1 [datasheet summary] atmel-42181cs?sam-d21_summary?07/2014 7.2.2 64-pin qfn table 7-5. device and package maximum weight table 7-6. package characteristics table 7-7. package reference 200 mg moisture sensitivity level msl3 jedec drawing reference mo-220 jesd97 classification e3
17 atmel | smart sam d2 1 [datasheet summary] atmel-42181cs?sam-d21_summary?07/2014 7.2.3 48-pin tqfp table 7-8. device and package maximum weight table 7-9. package characteristics table 7-10. package reference 140 mg moisture sensitivity level msl3 jedec drawing reference ms-026 jesd97 classification e3
18 atmel | smart sam d2 1 [datasheet summary] atmel-42181cs?sam-d21_summary?07/2014 7.2.4 48-pin qfn table 7-11. device and package maximum weight table 7-12. package characteristics table 7-13. package reference 140 mg moisture sensitivity level msl3 jedec drawing reference mo-220 jesd97 classification e3
19 atmel | smart sam d2 1 [datasheet summary] atmel-42181cs?sam-d21_summary?07/2014 7.2.5 32-pin tqfp table 7-14. device and package maximum weight table 7-15. package characteristics table 7-16. package reference 100 mg moisture sensitivity level msl3 jedec drawing reference ms-026 jesd97 classification e3
20 atmel | smart sam d2 1 [datasheet summary] atmel-42181cs?sam-d21_summary?07/2014 7.2.6 32-pin qfn table 7-17. device and package maximum weight table 7-18. package characteristics table 7-19. package reference 90 mg moisture sensitivity level msl3 jedec drawing reference mo-220 jesd97 classification e3
21 atmel | smart sam d2 1 [datasheet summary] atmel-42181cs?sam-d21_summary?07/2014 7.3 soldering profile the following table gives the recommended soldering profile from j-std-20. a maximum of three reflow passes is allowed per component. ___ rev ___256491 profile feature green package average ramp-up rate (217c to peak) 3c/s max preheat temperature 175c +/-25c 150-200c time maintained above 217c 60-150s time within 5c of actual peak temperature 30s peak temperature range 260c ramp-down rate 6c/s max time 25c to peak temperature 8 minutes max
22 atmel | smart sam d2 1 [datasheet summary] atmel-42181cs?sam-d21_summary?07/2014 table of contents description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 1. configuration summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2. ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2.1 sam d21e . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2.2 sam d21g . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.3 sam d21j . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3. block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 4. pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 4.1 sam d21j . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 4.2 sam d21g . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 4.3 sam d21e . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 5. product mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 6. processor and architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 6.1 cortex m0+ processor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 7. packaging information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 7.1 thermal considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 7.2 package drawings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 7.3 soldering profile. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 table of contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
arm connected logo atmel corporation 1600 technology drive, san jose, ca 95110 usa t: (+1)(408) 441.0311 f: (+1)(408) 436.4200 | www.atmel.com ? 2014 atmel corporation. / rev.: atmel-42181cs-sam-d21_summary_07/2014. atmel ? , atmel logo and combinations ther eof, enabling unlimited possibilities ? , and others are registered trademarks or trademarks of atmel corporation in u.s. and other countries. arm ? , arm connected ? logo, and others are the registered trademarks or trademarks of arm ltd. other terms and product names may be trademarks of others. disclaimer: the information in this document is provided in connec tion with atmel products. no license, express or implied, by estoppel or otherwise, to any intellectual property right is granted by this document or in connection with the sale of at mel products. except as set forth in the atmel terms and condit ions of sales located on the atmel website, atmel assumes no liability whatsoever and disclaim s any express, implied or statutory warranty relating to its p roducts including, but not limited to, the implied warranty of merchanta bility, fitness for a particular purpose, or non-infringement. in no event shall atmel be liable for any direct, indirect, consequential, punitive, special or incidental damages (including, without limi tation, damages for loss and profits, business interruption, or loss of information) arising out of th e use or inability to use this document, even if atmel has been advised of the possibility of such damages. atmel makes no representations or warranties with respect to the accuracy or c ompleteness of the contents of this document and reserves the right to make changes to specifications and products descriptions at any time without notice. atmel d oes not make any commitment to update the information contained herein. unless specifically provided otherwise, atmel products are not suitable for, and shall not be used in, automo tive applications. atmel products are not intended, authorized, or warranted for use as components in appl ications intended to support or sustain life. safety-critical, military, and automotive applications discla imer: atmel products are not designed for and will not be used in connection with any applications where the failure of such products would reasonably be expected to result in significant personal injury or death (?safety-critical a pplications?) without an atmel officer's specific written consent. safety-critical applications include, without limitat ion, life support devices and system s, equipment or systems for t he operation of nuclear facilities and weapons systems. atmel products are not designed nor intended for use in military or aerospace applications or environments unless specifically designated by atmel as military-grade. atmel products are not designed nor intended for use in automotive applications unless specifically designated by atmel as automotive-grade.


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